| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to easily perform a subsequent process on a planarized resultant structure, by preventing a step between a filling tungsten interconnection and an interlayer dielectric. CONSTITUTION: A gate electrode is formed on a semiconductor substrate. An impurity region is formed on the semiconductor substrate at both sides of the gate electrode. The first interlayer dielectric having a via hole is formed in an impurity region at a side of the gate electrode. A plug layer is formed in the via hole. The second interlayer dielectric(30) having a contact hole is formed on the plug layer. The filling metal interconnection(31) is formed in the contact hole. A predetermined depth of the second interlayer dielectric is etched to make the filling metal interconnection protrude. A metal layer is deposited on the second interlayer dielectric to surround the filling metal interconnection. The metal layer is etched to expose the second interlayer dielectric by using the mask layer while a metal interconnection is directly stacked on the filling metal interconnection.
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