发明名称 Image display
摘要 An image display in which occurrence of beat noise can be suppressed without adding noise to an image in a pixel converting process is provided. The frequency of a data clock is preset to a value at which beat noise is not apt to occur (a value such that one of the dot clock frequency of the input analog video signal and the frequency of the data clock is not equal to or close to an integral multiple of the other) for each kind of the input analog video signal and is stored as a frequency correspondence list in a memory MM. In accordance with the kind of the input analog video signal, a control block 4 selects the set frequency of the data clock and allows a data clock generating block 6 to generate a data clock Cd. Consequently, at the time of a pixel converting process performed by a signal processing block 5, without adding noise to an image, occurrence of beat noise is suppressed.
申请公布号 US2002060671(A1) 申请公布日期 2002.05.23
申请号 US20010882032 申请日期 2001.06.18
申请人 TACHIBANA MIYUKI;IWATAKA HIROKI 发明人 TACHIBANA MIYUKI;IWATAKA HIROKI
分类号 G09G3/36;G09G3/20;G09G5/00;H04N5/14;H04N5/66;(IPC1-7):G09G5/00 主分类号 G09G3/36
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