| 摘要 |
PURPOSE: A peripheral circuit of a CPU(Central Processing Unit) is provided to reduce the size of a memory and to cut down the price of a CPU by using a serial EEPROM(Electrically Erasable Programmable Read Only Memory) and a RAM(Random Access Memory). CONSTITUTION: The circuit comprises a CPU(21) to control the driving of a peripheral device(24) by an instruction of a program stored in a RAM(22), the RAM to store the program used for the CPU, a serial EEPROM(23) to output the program data stored in the RAM in the serial format, the peripheral device driven by the CPU, and a PLD(Programmable Logic Device)(25) to store the program data in the RAM before the CPU is operated normally, to separate a control signal outputted from the CPU, and to output the control signal to the RAM, the serial EEPROM and the peripheral device. The PLD consists of a block generator, an address generator, a serial EEPROM controller, a data converter, and a RAM controller.
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