| 摘要 |
A decoding apparatus without increase of the necessary memory capacity, necessary chip area for integration of the memory and manufacturing costs, and with a reduction of the bus band width. It includes block compressors 35 and 59 which compress, block by block, an MPEG compressed moving picture signal once decoded to block level, a block address table 38 for holding address information of each block of the data compressed by the block compressors and written into a memory 37, and block expanders 46, 48 and 50 for reading the compressed data from the memory 37 and expand it block by block. At the times of actual presentation and motion compensation, a necessary compressed data is read from the memory 37, expanded and used for the actual presentation and motion compensation.
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