发明名称 Non-volatile semiconductor memory and manufacturing method thereof
摘要 A non-volatile semiconductor memory manufacturing method, according to the present invention, is comprised of the process steps that follow. Device isolating layers are formed on predetermined places in a cell region. A layer of floating gate material is deposited next, all over the substrate. Either all the layer of floating electrode material, deposited on the device isolating layers or a part of it, is removed next, by etching, in order to form ditches. To fill the ditches, a first insulation layer is formed next, all over the cell region. A predetermined part of the first insulation layer is removed next, by etching, so the layer of floating electrode material is exposed. Thereafter, the ditches are filled in, on top of the device isolating oxide layers, with insulation layers. A second insulation layer is formed next, all over the cell region. Thereafter, electrode material layers and are deposited on the surface. The second insulation layer and the electrode material layers are all dry-etched, to form control electrodes in the cell region. Each part of the insulation layers is left on each of the device isolating oxide layers.
申请公布号 US6392269(B2) 申请公布日期 2002.05.21
申请号 US19990311733 申请日期 1999.05.14
申请人 NEC CORPORATION 发明人 KAWATA MASATO
分类号 H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/72 主分类号 H01L21/8247
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