| 摘要 |
A digital phase shifter capable of shifting the phases of data row by steps shorter than the sampling period even though the sampling signal the phase of which is fixed or a clock signal is used. This phase shifter comprises : a memory for storing consecutively time series data sampled at given periods in addresses corresponding to the sampling times ; reading means for reading from this memory consecutively the data at sampling times earlier than the current sampling time by a desired period of time in synchronism with the sampling of the time series data ; a register for holding several consecutive pieces of data including the latest one with respect to those read from the memory ; and means for generating interpolated data in desired divided positions at the sampling intervals of a plurality of pieces of data held in this register by adding weights to the plural pieces of data held in it. <IMAGE> |
