发明名称 INPUT/OUTPUT PROCESSING SYSTEM AND CPU PROCESS STAGNATION PREVENTING METHOD USED FOR IT
摘要 PROBLEM TO BE SOLVED: To provide an input/output processing system capable of shortening the occupation time of a CPU accompanying access to an I/O bus. SOLUTION: A CPU 1 setting information on access command group to I/O buses 120-12n in a command queue 2 arranged on a memory, writes a queue number and a top address of the command queue in a command control register for notifying an LSI 3 of them. In receipt of notification of the command queue number and the top address from the CPU 1, the LSI 3 receives the access command group information in the memory area and temporarily stores them for sequential execution. When all the command groups received from the command queue 2 are executed, finish information is set in the area of the corresponding queue number in the command queue 2, and the CPU 1 is informed of this fact.
申请公布号 JP2002140280(A) 申请公布日期 2002.05.17
申请号 JP20000334052 申请日期 2000.11.01
申请人 NEC CORP 发明人 SAKURAI HIROTO
分类号 G06F13/12;(IPC1-7):G06F13/12 主分类号 G06F13/12
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