发明名称 SYSTEM AND METHOD FOR REDUCING BUFFER CAPACITY FOR PACKET ASSEMBLING
摘要 <p>PROBLEM TO BE SOLVED: To overcome the problem such that a conventional ATM switch system has had to mount a cell buffer for each VPI/VCI to a packet assembling section in assembling cells into packets and transmitting the packets because the cells given to the system are discontinuous cells by each packet and cells from each port are furthermore multiplexed on the received cells that are given to a cell switch section and then switched. SOLUTION: The packet assembling buffer capacity reduction system of this invention is provided with a channel dependent cell output control section 11 that is placed at a pre-stage of an ATM cell switch and controls discontinuous cells configuring packets so as to be outputted continuously, a channel dependent cell buffer 10 that stores cells by each channel under the control of the control section 11, a port number provision section 12 that provides an input port number and an output port number to a cell switch 3, a port dependent cell output control section 23 that controls the discontinuous cells received from the cell switch 3 and configuring packets to be continuously outputted, and a port dependent cell buffer 22 that stores the cells by each port under the control of the control section 23.</p>
申请公布号 JP2002141907(A) 申请公布日期 2002.05.17
申请号 JP20000330533 申请日期 2000.10.30
申请人 NEC CORP;NEC COMMUN SYST LTD 发明人 INOIE HIROAKI;TADOKORO NAOAKI;AMEZUTSUMI TOSHIYUKI
分类号 H04L12/28;(IPC1-7):H04L12/28 主分类号 H04L12/28
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