发明名称 STORAGE SUB SYSTEM, CONTROL METHOD FOR I/O INTERFACE AND INFORMATION PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To suppress the increase of response time due to an execution of staging following a cache miss. SOLUTION: In the information processing system, the storage sub system composed of a disk controller 2 provided with a cache memory 24 and a subordinate disk device 3 is connected to a central processor 1 by an interface such as an FC-SB2 where the central processor 1 issues an I/O request composed of a plurality of commands and a chain of data asynchronously to a response from the disk controller 2. The disk controller 2 is provided with a function concurrently carrying out a process executing a command where object data hits the cache memory 24 and a process staging object data of a command of a cache miss from the disk device 3 to the cache memory 24.
申请公布号 JP2002140233(A) 申请公布日期 2002.05.17
申请号 JP20000332164 申请日期 2000.10.31
申请人 HITACHI LTD 发明人 FURUUMI NOBORU;AZUMI YOSHIHIRO
分类号 G06F3/06;G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F3/06
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