发明名称 POWER-ON RESET CIRCUIT AND ELECTRONIC DEVICE EMPLOYING IT
摘要 PROBLEM TO BE SOLVED: To downsize an electronic device provided with a power-on reset circuit by eliminating the need for a capacitor with large capacitance for a long reset period setting and reducing the number of components. SOLUTION: The power-on reset circuit 2 of this invention that generates a terminal voltage Vq to bring an electric state of a circuit 1 to a power-on reset state until a prescribed power-on reset period elapses after application of power to the circuit 1 and gives the terminal voltage to a reset terminal RET of the circuit 1, includes an electric series connection configuration between a fixed resistor R1 that shows a usual resistance change characteristic against a temperature change and a positive characteristic thermistor PT providing a PTC(Positive Temperature Coefficient) characteristic against the temperature change and uses a voltage at a connection point between the resistor R1 and the thermistor PT for the terminal voltage so as to eliminate the need for the capacitor for a long reset period setting.
申请公布号 JP2002141791(A) 申请公布日期 2002.05.17
申请号 JP20000335842 申请日期 2000.11.02
申请人 MURATA MFG CO LTD 发明人 OSADA SHINICHI
分类号 H03K17/22;(IPC1-7):H03K17/22 主分类号 H03K17/22
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