发明名称 DMA TRANSFER CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To efficiently transfer data according to a handshake method without shortening the internal clock cycle based on a burst transfer method. SOLUTION: This DMA transfer control device includes a plurality of buffer memories 103 accumulating data, a plurality of handshake circuits 106 arranged in parallel to the respective buffer memories according to capacity of the buffer memories, a reading control circuit 124 having a reading pointer performing counting in input of a signal requiring data reading from another integrated circuit, a writing control circuit 207 having a writing point performing counting in input of a signal requiring data writing from another integrated circuit, and a transfer demanding signal generation circuit 117 selecting and transmitting a data transfer demanding signal demanding transfer of the data according to the reading pointer or the writing pointer.
申请公布号 JP2002140285(A) 申请公布日期 2002.05.17
申请号 JP20000335361 申请日期 2000.11.02
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NOZAKI SHIRO;TAHIRA YOSHIHIRO
分类号 G06F13/28;G06F5/06;G06F13/38;(IPC1-7):G06F13/28 主分类号 G06F13/28
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