| 摘要 |
A method and apparatus for modeling a neural synapse function in analog hardware whereby the multiplication function inherent to the operation of a neural synapse is computed by applying a voltage on the gate-source terminals and an independent voltage on drain-source terminals of a MOSFET further using the resultant drain current of the latter device in non-saturation mode as function implementing a computation essentially close to multiplication function between the aforesaid voltages. Analog circuit is provided, capable of generating an output current signal which is proportional in magnitude, within a certain range, to a function computing essentially a sum of weighted input signals-products of corresponding pair of current input signal, and voltage control signal applied to a plurality of inputs thus capable of constructing an artificial neuron model.
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