WAFER ALIGNMENT METHOD IN EQUIPMENT FOR FABRICATING SEMICONDUCTOR

摘要

PURPOSE: A wafer alignment method in equipment for fabricating a semiconductor is provided to remarkably reduce fabricating delay time, by making a central processing unit select a substitutional align mark among a plurality of align marks while performing a prior process even if an alignment defect is caused by damaged corresponding align mark for performing an alignment. CONSTITUTION: A wafer is aligned by using at least one of the plurality of align marks. Whether the wafer is precisely aligned is determined. If the wafer is inaccurately aligned, a substitutional align mark is searched from stored information data of the align mark and an alignment process is performed regarding the wafer by using the searched align mark.