发明名称 TFT-LCD device having a reduced feed-through voltage
摘要 A TFT-LCD device has a plurality of scanning lines formed by a first level metallic layer, a plurality of data lines formed by a second level metallic layer, and an array of pixels each having a TFT and a pixel electrode made of a third level ITO layer. Each pixel further includes a shied ring formed by the second level metallic layer for suppressing variance in the parasitic capacitances formed between the pixel electrode and other conductive layers. The suppression of the variance in the parasitic capacitances reduces the feed-through voltage, thereby improving the display performance of the TFT-LCD device.
申请公布号 US2002057396(A1) 申请公布日期 2002.05.16
申请号 US20010008973 申请日期 2001.11.08
申请人 TSUBO YUMIKO 发明人 TSUBO YUMIKO
分类号 G02F1/1343;G02F1/136;G02F1/1362;G02F1/1368;G09F9/30;H01L29/786;(IPC1-7):G02F1/136 主分类号 G02F1/1343
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