发明名称 METHOD OF FORMING AN INTEGRATED CIRCUIT PACKAGE AT A WAFER LEVEL
摘要 A method of forming an integrated circuit package at the wafer level. The integrated circuit package occupies a minimum amount of space on an end-use printed circuit board. Solder bumps (30), or conductive adhesive, is deposited on the metallized wirebond pads (23) on the top surface of a silicon wafer (21). An underfill-flux material (27) is deposited over the wafer (21) and the solder bumps (30). A pre-fabricated interposer substrate (31), made of a metal circuitry (34) and a dielectric base (32), has a plurality of metallized through-holes (38) which are aligned with the solder bumps (30). The wafer/interposer assembly is reflowed, or cured, to form the electrical connection between the circuitry on the interposer layer (34) and the circuitry on the wafer. Solder balls (50) are then placed on the metal pad openings on the interposer substrate and are reflowed to form a wafer-level BGA structure. The wafer-level BGA structure is then cut into individual BGA chip packages.
申请公布号 WO0182361(A3) 申请公布日期 2002.05.16
申请号 WO2001US11035 申请日期 2001.04.04
申请人 ATMEL CORPORATION 发明人 LAM, KEN, M.
分类号 H01L23/12;H01L21/56;H01L21/60;H01L23/31;H01L23/498 主分类号 H01L23/12
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