| 摘要 |
A delay circuit includes a capacitor, a charging/discharging control circuit receptive of an input signal for controlling at least one of the charging and the discharging of the capacitor to set a delay time in accordance with a capacitance value of the capacitor, and a comparing circuit for comparing a voltage at a first terminal of the capacitor with a first reference voltage to produce an output signal which becomes inverted after the delay time when the voltage at the first terminal of the capacitor crosses over the first reference voltage during one of charging and discharging of the capacitor, and comparing a voltage at the first terminal of the capacitor with a second reference and producing an output signal which becomes inverted when the voltage at the first terminal of the capacitor is higher than the second reference voltage so that the delay time is reduced when the first terminal of the capacitor becomes short-circuited to an abnormally high voltage level.
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