发明名称 Method and apparatus for calculating delay times in semiconductor circuit
摘要 A method and apparatus for calculating circuit delay times efficiently arranges and stores data to reduce system memory requirements, which allows computers without large storage devices, such as conventional personal computers with limited hard disk space, to be used for testing preliminary device designs, Delay time ratio coefficient values representing a ratio of a delay time determined by values of dependency factors having a large correlation with one another to a predetermined reference delay time of a circuit element are stored in a coefficient table. The dependency factors include process condition, in use or operational temperature, and first and second operational supply voltages.
申请公布号 US6389381(B1) 申请公布日期 2002.05.14
申请号 US19980037063 申请日期 1998.03.09
申请人 FUJITSU LIMITED 发明人 ISODA MASAHITO;YONEDA TAKASHI;SUZUKI RIEKO
分类号 H01L21/82;G06F17/50;(IPC1-7):G06F9/455 主分类号 H01L21/82
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