发明名称 CLOCK SIGNAL GENERATING APPARATUS AND CLOCK SIGNAL GENERATING METHOD
摘要 In an apparatus for generating a clock signal with the phase thereof locked to the phase of a horizontal synchronization signal, noise superposed on the horizontal synchronization signal of a digital video signal is eliminated. A noise suppressing block is provided in front of a phase comparator. Typically, the noise suppressing block comprises a slice block and a spike removing block. The noise suppressing block is used for eliminating noise superposed on the horizontal synchronization signal of a digital video signal which is output by an A/D converter.
申请公布号 CA2198338(C) 申请公布日期 2002.05.14
申请号 CA19972198338 申请日期 1997.02.24
申请人 SONY CORPORATION 发明人 MATSUMOTO, HIROAKI;UKAI, MANABU
分类号 H04N5/06;H04N5/12;H04N5/21;H04N5/907;(IPC1-7):H04N5/06 主分类号 H04N5/06
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