发明名称 Semiconductor memory module and module system
摘要 Provided is a semiconductor memory module capable of decreasing a parasitic capacitance and a parasitic inductance which are incidental to a signal transmission path, thereby reducing a distortion of a signal waveform. In a memory module, four DRAMs are provided on a muttilayer printed circuit board in one line corresponding to a direction of arrangement of external terminals thereof and board terminal groups of the module are provided to make a pair along two long sides of the multilayer printed circuit board. The DRAM has external terminals extended from one of the long sides and external terminals extended from the other long side. Board terminals and board terminals in the board terminal group of the module are connected to the DRAM, and board terminals and board terminals in the board terminal group TGB of the module are connected to the DRAM.
申请公布号 US6388886(B1) 申请公布日期 2002.05.14
申请号 US20000714966 申请日期 2000.11.20
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TOBITA YOUICHI
分类号 G11C5/00;H05K1/11;H05K1/14;(IPC1-7):H05K7/02 主分类号 G11C5/00
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