| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device using a substrate bias variable transistor and a DTMOS which has a two-layer structure and a small margin required for a boundary of a well region. SOLUTION: A plurality of field effect transistors 223 are formed on a P type shallow well region 212, and a shallow element isolation region 214 on the P type shallow well region 223 has the depth which is more shallow than that of the junction between an N type deep well region 227 and the P type shallow well region 212. As a result, a plurality of field effect transistors 223 can share the P type shallow well region 212. On the other hand, because the P type shallow well region 212 is separated by the deep element isolation region 226 and the N type deep well region 227, a plurality of P type shallow well region 212 separating each other can be formed easily.
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