发明名称 COMPUTER MEMORY INTEGRATED WITH MEMORY CHECKING MEANS
摘要 PROBLEM TO BE SOLVED: To provide a computer memory having a memory checking means which is capable of effectively detecting abnormality of a decoding circuit specifying an accessing address. SOLUTION: The computer memory comprises a ROM 1, the decoding circuit 5, and a ROMSUM 201-218 (a memory checking means) for detecting abnormality of the decoding circuit 5. The ROMSUM has an ascending order addition processing routines 202-209 (ascending order adding means) and a descending order addition processing routines 210-217 (descending order adding means), and executes the routines 202-209 and the routines 210-217, alternately. When an operation result obtained by the routines 202-209 or by the routines 210-217 is not matched with addition data ROM-SUM adding all the data in each address of the ROM 1, the decoding circuit 5 is determined to be abnormal.
申请公布号 JP2002132589(A) 申请公布日期 2002.05.10
申请号 JP20000327552 申请日期 2000.10.26
申请人 AISIN SEIKI CO LTD 发明人 INAGUMA KATSUHIRO;SAITO KEIMIN
分类号 G06F12/16;G06F11/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址