发明名称 |
OUTPUT STAGE ESD PROTECTION FOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a new ESD protection technology for a circuit connected to an output stage. SOLUTION: An integrated circuit including a transistor comprises a first electrode connected to an output bonding pad and a second electrode connected to a reference potential such as a grounded bonding pad. A degeneration device is connected between the second electrode and the reference potential. A diode is connected between the second electrode of a transistor and the reference potential, an anode of the diode is connected to the second electrode reference potential and a cathode of the diode is connected to the reference potential for a PNP transistor.
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申请公布号 |
JP2002134700(A) |
申请公布日期 |
2002.05.10 |
申请号 |
JP20010225264 |
申请日期 |
2001.07.26 |
申请人 |
AGERE SYSTEMS GUARDIAN CORP |
发明人 |
PAUL C DAVIS |
分类号 |
H01L27/04;H01L21/822;H01L27/02;H01L27/06;H01L29/78;H03K5/08;H03L5/00;(IPC1-7):H01L27/06 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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