发明名称 RESISTIBILITY-ADJUSTED SILICON WAFER AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a wafer, by which an uniform getting effect can be attained in a wafer surface in a heat-treatment in a process of device, a coagulation of point defect scarcely exists even if at a relatively high pulling speed, a semiconductor integral circuit can be manufactured in a high yield, and a resistibility of wafer can be adjusted to a desired value. SOLUTION: The wafer is a p-type silicon wafer having the number of coagulation of point defect less than a detection lower limit value of 1×103/cm3, and the resistibility adjusted within a range of 1-15Ωcm. Boron and phosphorus are doped so that the boron density C1 of ingot is 1×1017 to 1×1020 atoms/cm3 and the phosphorus density is 0.90 C1 to 0.999 C1 atoms/cm3, and when the pulling speed of ingot is expressed by V and the temperature gradient in the vertical direction of the ingot on the contact surface of ingot with fused-silicon is expressed by G, an V/G value is decided and the ingot is pulled so that OSF which is produced in a ring-shape when a thermal oxidation treatment is made in a situation of wafer disappears in a center part of wafer.
申请公布号 JP2002134518(A) 申请公布日期 2002.05.10
申请号 JP20000328796 申请日期 2000.10.27
申请人 MITSUBISHI MATERIALS SILICON CORP 发明人 FURUKAWA JUN;NAKAJIMA TAKESHI;SHIRAKI HIROYUKI
分类号 C30B29/06;H01L21/208;H01L21/322;(IPC1-7):H01L21/322 主分类号 C30B29/06
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