| 摘要 |
A memory device having a segmented row repair architecture that provides the benefits of single bit repair, thereby efficiently utilizing redundant rows of the memory device, is disclosed. The rows of a memory device are segmented into four segments and segmented row repair is provided by selectively disabling a wordline driver for only one segment of the primary row in which a defective memory cell is located and enabling a redundant wordline driver with a redundant term signal provided by the redundancy matching circuit, thereby substituting a redundant row segment for only a specific segment of the entire row length. By selectively disabling only the wordline driver associated with the defective memory cell and dividing the primary and redundant rows into four segments, localized or single bit repair can be performed, thereby efficiently utilizing the redundant rows of the memory device. |
