| 摘要 |
<p>PROBLEM TO BE SOLVED: To make compatible both efficient processing and the expansion of available target data while effectively utilizing a circuit area when the number of sample data is large. SOLUTION: In this FFT arithmetic circuit, a crossing processing part 14 for outputting the data of the butterfly arithmetic result of a radix 8 from a first signal line group is provided with second and third signal line groups for extracting intermediate data in the middle of the relevant butterfly arithmetic. Then, the intermediate data corresponding to the butterfly arithmetic result of a radix 2 are outputted from the first signal line group, and the intermediate data corresponding to the butterfly arithmetic result corresponding to a radix 4 are outputted from the second signal line group.</p> |
