发明名称 Method of manufacturing an integrated semiconductor device having a plurality of connection levels
摘要 An integrated device comprises a first conductive region and a first insulating region of dielectric material covering the first conductive region. A first through region of electrically conductive material extends inside the first insulating region, and is in direct electrical contact with the first conductive region. A second conductive region, arranged above the first insulating region, is in a position not aligned and not in contact with the first through region. A second insulating region of dielectric material covers the second conductive region. A second through region of electrically conductive material extends inside the second insulating region as far as the first through region and is aligned and in direct electrical contact with the first through region. A third conductive region, arranged above the second insulating region, is aligned and in direct electrical contact with the second through region.
申请公布号 US2002055249(A1) 申请公布日期 2002.05.09
申请号 US20010001625 申请日期 2001.10.24
申请人 STMICROELECTRONICS S.R.L. 发明人 PIO FEDERICO
分类号 H01L21/768;H01L23/522;(IPC1-7):H01L21/476 主分类号 H01L21/768
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