发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS INSPECTION METHOD |
摘要 |
<p>PROBLEM TO BE SOLVED: To prevent a clock supplied to a processor part from becoming a minimum pulse in a start and a stop of oscillation even though the clock has been conventionally supplied to the processor part after an oscillation stabilization time is counted by a counter and to prevent increase of the inspection time even when the counter is an asynchronous one. SOLUTION: When an output signal 343 from a gate control part 303 is synchronized with the clock so as to be inputted to a gate circuit 304, the minimum pulse is prevented from being included in a clock input of the processor part 305. As a clock source can be switched to the processor part 305 by means of an external signal input pin 307, an asynchronous circuit 302 is tested at the same time when a scan test is carried out on the processor part 305.</p> |
申请公布号 |
JP2002131383(A) |
申请公布日期 |
2002.05.09 |
申请号 |
JP20000322303 |
申请日期 |
2000.10.23 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
YOSHIDA TAKAHARU;FUKUSHIMA HIROMASA;TOKOI MASAKI |
分类号 |
G01R31/28;G06F1/04;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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