| 摘要 |
A method of fabricating an integrated circuit. A thin liner (110, 210, 310) is deposited over dielectric layer including within a trench (108) and/or via (106). The thin liner (110, 210, 310) smoothes the sidewalls of the trench (108) and/or via (106) and reduces resistivity. The thin liner may comprise an organic or inorganic dielectric (110) or metal (210,310). A copper interconnect structure (116, 216, 316) is then formed over the thin liner (110, 210, 310).
|
