发明名称 |
Non-volatile semiconductor memory device |
摘要 |
A non-volatile semiconductor memory device is provided which is capable of shortening time required for determining a reading voltage in its reading circuit and of improving a data reading speed. The non-volatile semiconductor memory device has a feedback-type bias circuit (1) for letting currents to flow, in response to a first timing signal occurring when an address of a memory cell is selected from a load circuit (2) to the memory cell to be connected to a bit line through a bit line decoder according to selection of the address and to be connected through a word line, causing a predetermined bias current to be supplied to the bit line and for letting a current to flow in accordance with an ON-state or OFF-state of the memory cell, causing a reading voltage to be produced at a connection point with the load circuit (2) and a pre-charging circuit (3A) for letting currents to flow through the bit line in response to a second timing signal occurring in an early stage when the first timing signal is active and for interrupting currents flowing through the bit line in a last stage when the second timing signal is active. <IMAGE> |
申请公布号 |
EP1049102(A3) |
申请公布日期 |
2002.05.08 |
申请号 |
EP20000108841 |
申请日期 |
2000.04.26 |
申请人 |
NEC CORPORATION |
发明人 |
WATANABE, KAZUO;UEKUBO, MASAKI |
分类号 |
G11C16/06;G11C16/24;G11C16/28;G11C16/32;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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