发明名称 Synchronous semiconductor device and method for latching input signals
摘要 A compact synchronous semiconductor device having an improved set-up/hold time is disclosed. A decoder receives input signals and generates decoded signals. A delay-adjusting unit adjusts the delay time of each of the decoded signals and provides adjusted decoded signals. A latch circuit unit latches the adjusted decoded signals in synchronism with a clock signal.
申请公布号 US6385127(B1) 申请公布日期 2002.05.07
申请号 US20010832851 申请日期 2001.04.12
申请人 FUJITSU LIMITED 发明人 IKEDA SHINICHIRO
分类号 G11C11/407;G11C7/10;G11C8/06;G11C8/18;G11C11/409;H03K5/14;(IPC1-7):G11C8/00 主分类号 G11C11/407
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