| 摘要 |
A read reference scheme that uses current load matching on a reference word line path. In one embodiment, a flash memory device comprises a word line, a reference word line and a reference load circuit. The word line is coupled to a control gate of a memory cell. The reference word line is coupled to a control gate of a reference memory cell. In addition, the reference load circuit is coupled to the reference word line to approximately match a current load on the word line so a voltage level on the reference word line will be approximately equally to a voltage level on the word line during a read operation.
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