发明名称 Internal supply voltage generating circuit in a semiconductor memory device and method for controlling the same
摘要 A method for controlling an internal supply voltage generating circuit reduces power consumption in an active mode. The internal supply voltage generating circuit includes a first voltage-drop regulator, which supplies a relatively large driving power to an internal circuit, and a second voltage-drop regulator, which supplies a relatively small driving power to the internal circuit. First, the second voltage-drop regulator is activated and the first voltage-drop regulator is inactivated in one of a stand-by mode and a power-down mode. Then, at least the first voltage-drop regulator is activated in an active mode, and the first voltage-drop regulator is inactivated in an active pause of the active mode. The first voltage-drop regulator is activated when the active pause is cancelled.
申请公布号 US6385119(B2) 申请公布日期 2002.05.07
申请号 US20010772076 申请日期 2001.01.30
申请人 FUJITSU LIMITED 发明人 KOBAYASHI ISAMU;KATO YOSHIHARU;NAGAI KENJI
分类号 G05F3/24;(IPC1-7):G06F1/26 主分类号 G05F3/24
代理机构 代理人
主权项
地址