发明名称 Adaptive equalizing circuit
摘要 High-order partial response equalization is performed so that the equalization error of an input signal having non-linear distortions is minimized, thereby improving the characteristics of a reproduced signal. An input signal is subjected to high-order partial response equalization adapted to a non-linear distortion waveform by using a transversal filter 3; a provisional equalization target value is estimated by a provisional decision circuit 4; an error between the provisionally decided value and the input signal is detected by an error detection circuit 5; an error between the provisionally decided value and the output signal from an A/D converter 1 is detected by an input distortion detection circuit 7; the error outputted from the error detection circuit 5 is monitored by an output distortion detection circuit 6; the equalization target value is controlled by an equalization target control means 8 so that the equalization error is minimized; and tap coefficients are controlled by a tap coefficient control means 10.
申请公布号 US6385239(B1) 申请公布日期 2002.05.07
申请号 US20000647428 申请日期 2000.11.15
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OKAMOTO TOSHINORI;OGURA YOUICHI
分类号 G11B20/10;G11B20/18;H03H15/00;H03H21/00;H04B3/06;H04L25/03;H04L25/497;(IPC1-7):H03H7/30 主分类号 G11B20/10
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