发明名称 |
METHOD FOR FORMING MOS TRANSISTOR MINIMIZING SHORT CHANNEL EFFECT |
摘要 |
PURPOSE: A method for forming a MOS transistor minimizing a short channel effect is provided to minimize degradation due to leakage current and hot carrier by reducing the short channel effect. CONSTITUTION: An active region trench(110) is formed on an active region of a semiconductor substrate(100). The active region trench(110) has a width shorter than a length of a channel. The trench is buried by an insulating layer. An epitaxial layer(210) is deposited on a whole surface of the semiconductor substrate(100) including the insulating layer. An isolation trench is formed on the semiconductor substrate(100) and the epitaxial layer(210). The isolation trench is buried by an insulating layer. A gate electrode(610) is formed on the epitaxial layer(210). A source region(710) and a drain region(720) are formed on a left side and a right side of the gate electrode(610).
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申请公布号 |
KR20020032934(A) |
申请公布日期 |
2002.05.04 |
申请号 |
KR20000063710 |
申请日期 |
2000.10.28 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
OH, YONG CHEOL |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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