| 摘要 |
PURPOSE: A circuit for generating a reset signal is provided to compare the amount of current to each other and stabilize an operating characteristic by using two different transistors. CONSTITUTION: A capacitor(C2) is connected between a supply voltage(Vcc) and the first node(K11). The first PMOS transistor(P11) is connected between the supply voltage(Vcc) and the first node(K11). A gate of the first PMOS transistor(P11) is connected with the second node(K12). The second PMOS transistor(P12) is connected between the supply voltage(Vcc) and the second node(K12). A gate of the second PMOS transistor(P12) is connected with the first node(K11). The first NMOS transistor(N11) is connected between the first node(K11) and a ground. The first NMOS transistor(N11) is operated as a diode. The second NMOS transistor(N12) is connected between the second node(K12) and the ground. A gate of the second NMOS transistor(N12) is connected with the first node(K11). The first and the second inverters(I11,I12) are connected between the second and the third nodes(K12,K13). The third inverter(I13) is connected between the third node(K13) and an output terminal. The third NMOS transistor(N13) is connected between the first node(K11) and the ground. A gate of the third NMOS transistor(N13) is connected with the third node(K13).
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