发明名称 |
Video data processing device comprising a buffer memory |
摘要 |
<p>The processor includes a first circuit which reads data packets of a fixed length and stores them in a buffer memory. A second circuit reads the data packets from the buffer memory. A pointer in the buffer memory is reset to zero when the start of a data packet is detected. The pointer is formed from a comparator which compares a synchronisation word at the beginning of the packet with the data received. The pointer allows the writing of data to a particular area of the buffer memory. The second circuit is initialised when reading of the buffer memory does not commence for a predetermined time interval after writing of the data packet in the buffer memory.</p> |
申请公布号 |
EP0773689(B1) |
申请公布日期 |
2002.05.02 |
申请号 |
EP19960402376 |
申请日期 |
1996.11.07 |
申请人 |
THOMSON MULTIMEDIA |
发明人 |
HANNA, C.;DORNER, A.;COCHON, E. |
分类号 |
G06F5/06;G11C7/00;H04L13/08;H04N7/08;H04N7/081;H04N7/26;H04N7/32;(IPC1-7):H04N7/32 |
主分类号 |
G06F5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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