发明名称 SYSTEM AND METHOD FOR FACILITATING WAFER ALIGNMENT BY MITIGATING EFFECTS OF RETICLE ROTATION ON OVERLAY
摘要 The present invention relates to wafer alignment. A reticle (50) is employed which includes, a design (54), and a first and second set of scribe marks (60, 62, 64, 66). The first and second sets of scribe marks (60, 62, 64, 66) have an associated symmetry relative to the reticle design (54). The design and scribe marks are printed at selected field locations on a surface layer of the wafer (96). The first and second sets of scribe marks as printed (102, 110, 130, 140) at adjacent fields on the surface layer of wafer (96) form a composite set of scribe marks (98a, 98b). The symmetric relationship between the first and second sets of scribe marks results in the composite set of scribe marks substantially negating print errors of the marks due to reticle rotation and/or lens magnification with respect to a geometric reference point of the composite set of scribe marks (98a, 98b). The employment of the composite set of scribe marks, such as to locate a corresponding virtual alignment mark (162, substantially facilitates mitigation of overlay error in wafer alignment.
申请公布号 WO0235288(A1) 申请公布日期 2002.05.02
申请号 WO2001US30931 申请日期 2001.10.02
申请人 ADVANCED MICRO DEVICES, INC. 发明人 TEMPLETON, MICHAEL, K.;RANGARAJAN, BHARATH
分类号 G03F7/20;G03F9/00;(IPC1-7):G03F9/00 主分类号 G03F7/20
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