发明名称 |
High speed video frame buffer |
摘要 |
A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
|
申请公布号 |
US2002050959(A1) |
申请公布日期 |
2002.05.02 |
申请号 |
US20010934444 |
申请日期 |
2001.08.21 |
申请人 |
BUCKELEW MATT E.;CARLTON STEWART G.;DEMING JAMES L.;FARMER MICHAEL S.;HEINRICH STEVEN J.;MOSLEY MARK A.;WHITMORE CLIFFORD A. |
发明人 |
BUCKELEW MATT E.;CARLTON STEWART G.;DEMING JAMES L.;FARMER MICHAEL S.;HEINRICH STEVEN J.;MOSLEY MARK A.;WHITMORE CLIFFORD A. |
分类号 |
G09G5/36;G09G5/39;G09G5/393;G11C7/10;G11C8/00;(IPC1-7):G09G3/20 |
主分类号 |
G09G5/36 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|