| 摘要 |
A method of fabricating a gate is described. A first dielectric layer having a first opening is formed on a substrate. A gate dielectric layer is formed in the opening. A lower portion of a floating gate is formed on the gate dielectric layer. A source/drain region is formed in the substrate beside the lower portion of the floating gate. A conductive layer is formed on the first dielectric layer to completely fill the first opening. The conductive layer is patterned to form a second opening in the conductive layer. The second opening is above the first opening and does not expose the first dielectric layer. The second opening has a tapered sidewall and a predetermined depth. A mask layer is formed to cover the conductive layer and fill the second opening. The mask layer outside the second opening is removed to expose the conductive layer. A portion of the mask layer is removed to leave a first etching mask layer in the second opening. An anisotropic etching process using the first etching mask layer as a mask is performed to etch the conductive layer. An upper portion of the floating gate is formed. The first dielectric layer is exposed. The first etching mask is removed. Thereafter, a dielectric layer between gates and a control gate is formed over the floating gate.
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