| 摘要 |
<p>Techniques for implementing vocoders in parallel digital signal processors are described. A preferred approach is implemented in conjunction with the BOPS Manifold Array (ManArray) processing architecture (20) so that in an array of N parallel processing elements (32, 34, 38, 36), N channels of voice communication (22, 24, 26, 28) are processed in parallel using a cluster switch (42). Techniques for forcing vocoder processing of one data-frame to take the same number of cycles are described. Improved throughput and lower clock rates can be achieved.</p> |
