Apparatus and method for an interface unit for data transfer between a host processor and a digital signal processor in the asynchronous transfer mode

摘要

In a data processing system have a master-state data processing unit and at least one slave-state data processing unit, the data processing units can be provided with an asynchronous transfer mode interface unit 18 for transferring data cells there between. The interface unit 18 provides and receives signals formatted in the Utopia protocol. The interface unit 18 includes processor acting as a state machine 181, 184 and a buffer out memory unit 182, 183 for buffering the data groups between the interface unit processor and the direct memory access unit of the data processing unit. The interface unit 18 can act in a receive mode and a transmit mode for a master-state data processing unit and can act in a receive mode 181, 182 and transmit mode 184, 183 in a slave-state data processing unit. An event signal provides an efficient exchange of transfer of data between the direct memory access unit 14 and the buffer memory storage unit 182, 183 in the slave mode. <IMAGE>