| 摘要 |
<p>A plurality of buses are provided on a backplane, while these buses can be used by different CPU boards and a shared memory can be accessed by each CPU. The arrangement above has a plurality of CPUs made it possible that function on a single backplane and these CPUs share data by using the shared memory. In addition, the slots for functional boards can be distributed between arbitrary buses, making it possible to adjust the number of functional boards used by each CPU board as well as to achieve flexibility in selecting the number of functional boards being used in accordance with the purpose of a particular CPU board. <IMAGE></p> |
