| 摘要 |
PURPOSE: A method for forming a stacked via hole in a semiconductor device is provided to be capable of simplifying manufacturing processes and improving integration degree. CONSTITUTION: The first interlayer dielectric(3) is formed on a semiconductor substrate(1) having a junction layer(2). The first wiring pattern(7) is formed on the first interlayer dielectric. The second interlayer dielectric(8) is formed on the resultant structure. A stacked via hole(13) is then formed by sequentially etching the second interlayer dielectric(8), the first wiring pattern(7) and the first interlayer dielectric(3). After forming a diffusion barrier layer on the resultant structure, a metal film is filled into the stacked via hole. Then, the second wiring pattern is formed on the resultant structure.
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