| 摘要 |
PURPOSE: A method for forming multilayer wiring in a semiconductor device is provided to be capable of improving step coverage and minimizing the distance between wirings. CONSTITUTION: A transistor including a gate oxide layer, a gate electrode(32) and a source/drain region, is formed on a substrate(30). After depositing sequentially the first and second insulating layer, a protrudent wiring contact portion(35) is formed by selectively etching the second insulating layer. A contact hole is formed by selectively etching the second and first insulating layer. The first wiring(40) is then formed by filling a conductive layer into the contact hole. The third and fourth insulating layer(41,42) are sequentially formed on the resultant structure. After exposing the first wiring(40) by etch-back of the fourth insulating layer, the second wiring(45) is formed on the exposed first wiring.
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