发明名称 Column redundancy for prefetch
摘要 An integrated memory circuit is provided having at least one subtractor coupled to each redundant fuse set for subtracting a predetermined value from a known redundant address value, thereby calculating a comparison value. Once the comparison value is calculated, it is forwarded to a redundant compare circuit where it is compared to the address of a primary circuit element specified by the user. If a match is found, the primary circuit element sought to be accessed is bypassed and a redundant circuit element is activated to carry out the desired operation.
申请公布号 US6381183(B1) 申请公布日期 2002.04.30
申请号 US20010875181 申请日期 2001.06.07
申请人 MICRON TECHNOLOGY, INC. 发明人 PENNEY DANIEL B.
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
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