发明名称 Video signal processing circuit and computer system
摘要 A video signal processing circuit, in which a horizontal synchronizing signal is separated from an input analog video signal by a synchronism separating circuit, whether a "H" period of the horizontal synchronizing signal continues for more than a prespecified period of time or not is checked by a synchronizing signal monitoring counter, and power supply to an A/D converter is controlled thereby according to a result the confirmation.
申请公布号 US6380982(B1) 申请公布日期 2002.04.30
申请号 US19980040424 申请日期 1998.03.18
申请人 FUJITSU LIMITED 发明人 OBITSU TOSHIRO
分类号 H04N5/14;G09G3/20;G09G5/00;G09G5/36;H04N5/10;H04N5/63;H04N9/04;(IPC1-7):H04N7/00;H04N11/00 主分类号 H04N5/14
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