发明名称 EDGE TRIGGERED D FLIP-FLOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an edge triggered D flip-flop circuit which can be integrated in a small chip area and is suitable for mass production. SOLUTION: The edge triggered D flip-flop circuit comprises a master circuit including one master switch connected with a data input terminal and controlled by a clock signal, and a first inverter having one input terminal and one output terminal connected with the master switch; and a slave circuit including a slave switch controlled by a clock signal and connected with the output terminal of the first inverter, a second inverter having one input terminal and one output terminal connected with the slave switch, and a feedback loop provided with a feedback switch and a third inverter and connected with the input and output terminals of the second inverter. The master switch and the slave switch are n-channel metal oxide semiconductor field-effect transistors.
申请公布号 JP2002124853(A) 申请公布日期 2002.04.26
申请号 JP20010266396 申请日期 2001.09.03
申请人 INFINEON TECHNOLOGIES AG 发明人 RAYCHAUDHURI ARINDAM
分类号 H03K3/037;H03K3/3562;(IPC1-7):H03K3/037 主分类号 H03K3/037
代理机构 代理人
主权项
地址