发明名称 |
SHARED DEVICE USING SPLIT BUS AND TIME SLOT INTERFACE BUS ARBITRATION, AND MEMORY |
摘要 |
PROBLEM TO BE SOLVED: To provide a method and a device for arbitration in an expanded digital system. SOLUTION: This arbitrating device includes an isolation device 199 for separating a common data bus, arbiters 142 and 134 on a priority base for controlling access to the internal part of the common data bus including a processor or other bus masters, and a time slot arbiter for controlling access to an external part of the common data bus including a plurality of bus masters 295 and 297, an external memory interface 124, etc., and can perform efficient access control to the common data bus. A common external memory 107 uses both parts of isolated common data bus and is allocated for exclusive or non- exclusive use by many devices. An external device 112 that accesses the external memory can directly communicate with one or more bus masters on the internal part of the common data bus.
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申请公布号 |
JP2002123483(A) |
申请公布日期 |
2002.04.26 |
申请号 |
JP20010259323 |
申请日期 |
2001.08.29 |
申请人 |
AGERE SYSTEMS GUARDIAN CORP |
发明人 |
CHODNEKAR SUCHETA S;FISCHER FREDERICK H;FITCH KENNETH DANIEL;VELINGKER AVINASH;VOMERO JAMES FRANK;WHALEN SHAUN PATRICK |
分类号 |
G06F13/362;G06F12/00;G06F13/36;G06F13/368;G06F13/372;G06F13/40;(IPC1-7):G06F13/362 |
主分类号 |
G06F13/362 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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