INTEGRATED CIRCUIT WITH SELF-TEST CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide an integrated circuit having an application circuit 1 to be tested and a self-test circuit for testing the application circuit 1. SOLUTION: This semiconductor has an arrangement element for generating a deterministic test sample supplied to the application circuit 1 for the purpose of a test. An output signal generated by the application circuit 1 is estimated by use of a signature register according to the test sample. The self-test circuit 5-16 includes a masking logic element 14 blocking bits of the output signal from the application circuit 1 during the test. The output signal of the application signal 1 has an indeterminate state based of a circuit configuration of the application circuit 1. Only the other bits are sent to the signature register. Thereby, an unlimited ON-chip test for the integrated circuit can be certainly executed according to the purpose of the test without an additional circuit element in the application circuit 1.