Method for testing a memory store with multiple memory banks each with an addressable memory area writes test data into the addressed memory areas of the memory banks.

摘要

Multiple memory banks (2) are selected simultaneously in a test mode to write a piece of adjacent test data into the commonly addressed memory areas of the selected memory banks. A test circuit (12) causes multiple memory bank selection lines (6) to be selected together. As test data is read out, a comparing device (9) can be there that compares the test data read out at the same time and generates a memory status signal if pieces of this test data differ from each other. An Independent claim is also included for an integrated circuit for testing a memory store with multiple memory banks.